Exercise for Atmega32 using Assembly Language

(Basic Exercise for Atmega32 using Assembly Language)

Salam kepada semua student di luar sana yang ada masalah nak buat tugasan MikroPie, di sini kami berkongsi secara percuma Assembly Language untuk tugasan LED run kiri kanan, juga Count 7 Segment up and down. Selamat meniru, he he (jika tidak faham boleh tanya kami di email afrentech@gmail.com.

Hi Everybody especially to students who still struggling to complete their microp assignments. Good news to all of you, here we would like to share with you an example of microp assignment using assembly language. The tasks for this assignment include running light, 7 segment count up and 7 segment count down. Please try it out. (Any questions don't hesitate to ask us via email afrentech@gmail.com.

Flow Chart

Example of Circuit

;****************  Example of Program  **********************************

 .ORG 0x0000 ;
 RJMP Main

 Main:
LDI R16,low(RAMEND); Set up stack
OUT SPL,R16
LDI R16,high(RAMEND)
OUT SPH,R16
LDI R16,0xFF
OUT DDRA,R16
LDI R16,0xFF
OUT DDRB,R16



Check_Case1:
IN R16,PIND
ANDI R16,0b00000011
CPI  R16,0b00000011
BRNE Default1
JMP Task1

Check_Case2:
IN R16,PIND
ANDI R16,0b00000011
CPI  R16,0b00000010
BRNE Default2
JMP Task2

Check_Case3:
IN R16,PIND
ANDI R16,0b00000011
CPI  R16,0b00000001
BRNE Default3
JMP Task3

Check_Case4:
IN R16,PIND
ANDI R16,0b00000011
CPI  R16,0b00000000
BRNE Default4
JMP Task4

Default1:
LDI R16,0x00
OUT PORTA,R16
LDI R16,0x00
OUT PORTB,R16
JMP Check_Case2

Default2:
LDI R16,0x00
OUT PORTA,R16
LDI R16,0x00
OUT PORTB,R16
JMP Check_Case3

Default3:
LDI R16,0x00
OUT PORTA,R16
LDI R16,0x00
OUT PORTB,R16
JMP Check_Case4

Default4:
LDI R16,0x00
OUT PORTA,R16
LDI R16,0x00
OUT PORTB,R16
JMP Main

Task1:
LDI R16,0x00
OUT PORTA,R16
RCALL delay_05
LDI R16,0x01
OUT PORTA,R16
RCALL delay_05
LDI R16,0x02
OUT PORTA,R16
RCALL delay_05
LDI R16,0x03
OUT PORTA,R16
RCALL delay_05
LDI R16,0x04
OUT PORTA,R16
RCALL delay_05
LDI R16,0x05
OUT PORTA,R16
RCALL delay_05
LDI R16,0x06
OUT PORTA,R16
RCALL delay_05
LDI R16,0x07
OUT PORTA,R16
RCALL delay_05
LDI R16,0x08
OUT PORTA,R16
RCALL delay_05
LDI R16,0x09
OUT PORTA,R16
RCALL delay_05
LDI R16,0x00
OUT PORTA,R16
RCALL delay_05
RCALL  Check_Case2

Task2:
LDI R16,0x90
OUT PORTA,R16
RCALL delay_05
LDI R16,0x80
OUT PORTA,R16
RCALL delay_05
LDI R16,0x70
OUT PORTA,R16
RCALL delay_05
LDI R16,0x60
OUT PORTA,R16
RCALL delay_05
LDI R16,0x50
OUT PORTA,R16
RCALL delay_05
LDI R16,0x40
OUT PORTA,R16
RCALL delay_05
LDI R16,0x30
OUT PORTA,R16
RCALL delay_05
LDI R16,0x20
OUT PORTA,R16
RCALL delay_05
LDI R16,0x10
OUT PORTA,R16
RCALL delay_05
LDI R16,0x00
OUT PORTA,R16
RCALL delay_05
RCALL  Check_Case3

Task3:
LDI R16,0b00000001
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00000010
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00000100
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00001000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00010000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00100000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b01000000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b10000000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b01000000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00100000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00010000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00001000
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00000100
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00000010
OUT PORTB,R16
RCALL delay_05
LDI R16,0b00000000
OUT PORTB,R16
RCALL delay_05
RCALL  Check_Case4

Task4:
IN R16,PIND
ANDI R16,0b00011100
MOV R17,R16
LSR R17
LSR R17
IN R18, PIND
ANDI R18,0b11100000
MOV R19,R18
LSR R19
LSR R19
LSR R19
LSR R19
LSR R19
ADD R17,R19
OUT PORTA,R17
RCALL delay_05
JMP Main

delay_05:
LDI R16,8

outer_loop:
LDI R24,low(3037)
LDI R25,high(3037)

delay_loop:
ADIW R24,1
BRNE delay_loop
DEC R16
BRNE outer_loop
RET

;*************************************************************